The invention relates to a semiconductor circuit arrangement having a substrate, which carries in the order specified:
a doped semiconductor layer of a first conductivity type or conduction type,
an electrically insulating layer,
and an electrically conductive or an electrically insulating charge-storing layer, which is suitable for the storage of charges.
Moreover, the semiconductor circuit arrangement contains at least one trench which penetrates through the charge-storing layer and also extends into the doped semiconductor layer.
The substrate is for example a wafer made of a semiconductor material, e.g. made of silicon. The layer suitable for the storage of charges is also referred to as floating gate particularly in the case of circuit arrangements having memory cells.